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Description: 4位ALU逻辑运算单元,可进行加法、减法、逻辑运算、移位等操作。-4 ALU logical operation unit, can be additive, subtraction, logic operations, shift and other operations.
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Size: 1024 |
Author: 甲天下 |
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Description: 王金明老师讲述的100个Verilog代码示例,并附带有相关说明,Verilog初学者很好的入门资料!-Wang Jinming teacher described Verilog sample code 100, together with a related note, Verilog good introductory information for beginners!
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Size: 167936 |
Author: 王鹏 |
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Description: 用verilog语言编写,一个8-bit ALU,可以完成按字节的+、-和与、或、非操作-Using Verilog language, an 8-bit ALU, to be completed by byte+,- And, or, non-operating
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Size: 203776 |
Author: 徐芬 |
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Description: 用verilog HDL代码编写的快速除法器,比较有用
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Size: 15360 |
Author: 徐芬 |
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Description: ALU可以实现16种操作(包括加减乘除移位运算等)-ALU can be 16 kinds of operations (including addition and subtraction multiplication and division shift operator, etc.)
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Size: 838656 |
Author: 草野彰 |
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Description: 用verilog语言编写的4位算术逻辑单元ALU,功能参考74181,包含.v文件以及测试用.vwf文件-Verilog languages with four arithmetic logic unit ALU, functional reference to 74,181, including. V documents and testing. Vwf document
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Size: 2048 |
Author: 颜心馨 |
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Description: 计算机组成原理实验(MAX PLUS)
1.ALU设计
2.MEM设计
3.32位2选1选择器-Principles of Computer Organization Experiment (MAX PLUS) 1.ALU design 2.MEM design 3.32 2 election 1 selector
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Size: 244736 |
Author: 翁浩达 |
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Description: 算术运算单元ALU的设计,才用VHDL语言编写,有仿真波形-vhdl alu
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Size: 94208 |
Author: wer |
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Description: verilog code for alu in RISC processor
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Size: 1024 |
Author: John jose |
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Description: Verilog based 8 bit ALU module, implemented on Spartan 3E FPGA.
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Size: 9216 |
Author: ifusmell |
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Description: ALU算术逻辑单元,8位,含源程序以及仿真后的波形图-ALU arithmetic logic unit 8, including source code, as well as post-simulation waveform
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Size: 29696 |
Author: 赵剑平 |
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Description: 这是32位alu的代码,使用verilog写的,包含了简单的运算功能-This is a 32-bit alu code, use verilog to write, and includes a simple arithmetic functions
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Size: 1024 |
Author: 杨恋 |
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Description: Verilog语言3个程序,包括4位二进制的BCD码加法器,ALU位片,交通信号灯。既有源码也有word文档说明。-Verilog language three procedures, including 4-bit binary code of the BCD adder, ALU-bit chip, traffic lights. Only source documents that have word.
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Size: 1596416 |
Author: 郭函 |
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Description: 用Verilog编写的简单的运算单元(ALU),可实现加、减、与、或、异或、非、左、右移等功能-Verilog prepared with simple arithmetic unit (ALU), can be add, subtract, and, or, exclusive-OR, non-, left, and other functions shifted to right
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Size: 191488 |
Author: wangzhen |
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Description: alu 4 bit with verilog in modelsim and work correct
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Size: 41984 |
Author: sara |
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Description: 算术逻辑部件的verilog代码,它能够实现半加器、全加器、比较、按位与、按位或、按位异或、加一、减一的操作-Arithmetic logic unit of the verilog code, it can achieve half adder, full adder, compare, bitwise and, bitwise or, bitwise xor, plus one, minus one operation
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Size: 169984 |
Author: 李鹏飞 |
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Description: mcu,risc cpu Verilog源代码-mcu,risc cpu Verilog
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Size: 4096 |
Author: yzhang |
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Description: verilog hdl alu module
it is 32bit alu and 1bit alu
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Size: 368640 |
Author: park |
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Description: design files in verilog, alu, array mult, carry shift etc.
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Size: 37888 |
Author: p2p_123 |
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Description: 4位并行乘法器 4位超前加法器 ALU 计数器 滤波器 全加器 序列检测器 移位器-failed to translate
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Size: 6144 |
Author: 向死而生 |
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